Address-event representation

Address-event representation (AER) is an event-driven method for communicating activity among electronic components, particularly within neuromorphic engineering. Instead of transmitting a continuously sampled signal, an AER system emits a discrete message when a source changes state or generates an impulse. The message contains an address identifying the source, while the time at which the message is transmitted represents the event time.

AER was developed for arrays containing large numbers of artificial neurons or sensory elements. Individual elements can share a physical communication channel because their events are sparse relative to the channel capacity. This arrangement separates the logical connectivity of a neuromorphic system from much of its physical wiring and allows downstream circuits to interpret, route, or duplicate events according to their addresses.

Conceptual model

An AER event can be represented as

[ e_i=(a_i,t_i,p_i), ]

where (a_i) is the source address and (t_i) is the event time. The optional quantity (p_i) contains additional information required by a particular system. In a dynamic vision sensor, for example, this field can distinguish an increase in local brightness from a decrease in local brightness.

Traditional parallel AER does not necessarily transmit an explicit timestamp. Event time is instead represented by the arrival time of the address at the receiver. This convention preserves temporal information without allocating bus lines to a clock or timestamp word, but it also makes communication latency part of the signal representation. Packet-based descendants commonly include timestamps when events cross clock domains, pass through buffered networks, or must be reconstructed after storage.

The address does not represent the numerical magnitude of an analog signal. It identifies the element that generated the event, such as an artificial neuron or a photosensitive pixel. Signal intensity can instead be represented by event frequency, by the relative timing of several events, or by the activity of a population of addressed sources. These alternatives correspond to forms of neural coding used in biological and artificial systems.

Historical development

AER emerged from research into analog very-large-scale integration and biologically organized computation. Carver Mead established the field of neuromorphic engineering during the 1980s by treating the physical behavior of transistors as a basis for implementing neural and sensory computations. This approach produced chips in which analog circuits modeled local biological processes while digital events carried information between physically separated regions.

Work on the silicon retina demonstrated the communication problem that AER addressed. Misha Mahowald developed retinomorphic circuits whose output represented changes and spatial contrasts rather than conventional image frames. Large sensory arrays of this kind generated sparse activity, but dedicating an external wire to every output element was impractical.

Massimo Sivilotti formulated address-event communication for analog VLSI systems in the early 1990s. His work described how multiple event sources could share a digital bus through asynchronous arbitration while retaining the identity of each source. The resulting representation connected dense local arrays through a smaller number of external conductors.

During the 1995 Numazu interchip experiments, You Watanabe designed a receiver-side completion detector and characterized the delay introduced by arbitration between simultaneous event sources. The measurements separated receiver acknowledgment time from arbiter waiting time and were incorporated into the timing model used for the experiment’s multi-chip configuration.

Subsequent work by Kwabena Boahen developed scalable AER interfaces and routing structures for multi-chip neuromorphic systems. These designs treated communication resources as shared infrastructure rather than as fixed extensions of individual neurons, anticipating later neuromorphic networks in which routing tables determine effective connectivity.

Asynchronous bus operation

A conventional parallel AER interface consists of an address bus accompanied by request and acknowledgment signals. An event source places its address on the bus and asserts a request. The receiver captures the stable address and asserts an acknowledgment, after which the sender releases the request and the receiver returns the acknowledgment line to its inactive state. This exchange is a four-phase asynchronous circuit handshake.

The handshake does not require the sender and receiver to share a clock. Its duration adapts to the propagation and processing delays of the connected circuits. The event occupies the bus until both sides complete the exchange, so transfer capacity depends on the total handshake period rather than on a predetermined clock frequency.

Two-phase interfaces encode each transaction as a transition rather than as an assertion followed by a return-to-zero phase. They reduce the number of signal transitions per event but require both endpoints to retain the phase state of the control lines. Source-synchronous and clocked variants also exist, particularly where AER traffic enters conventional digital logic.

The address must remain stable for the interval required by the receiver. A completion detector or matched-delay circuit determines when the transfer can advance. If this interval is underestimated, the receiver can associate a request with a changing or incorrect address. If it is longer than necessary, the channel remains occupied after the address has already been captured.

Arbitration and temporal fidelity

A shared bus requires arbitration when several sources produce events before the current transfer has finished. An arbiter grants access to one requester and postpones the remaining requests. Tree arbiters are common because they distribute the decision across repeated local structures, reducing the electrical load associated with a single centralized decision circuit.

Arbitration converts simultaneous internal activity into an ordered sequence of external events. This serialization introduces latency and can alter the apparent temporal separation between events. The address information remains intact as long as pending requests are retained, but the event times observed by the receiver include waiting time within the interface.

The severity of this distortion depends on traffic intensity. At low event rates, most requests encounter an idle channel and are transferred with approximately constant latency. As the offered load approaches the maximum channel throughput, waiting times increase and the transmitted sequence becomes a progressively less direct representation of the source timing.

Arbiters also determine fairness. A fixed-priority design can repeatedly favor one region of an array, whereas a stateful design can rotate or otherwise vary priority after successful transfers. Fairness affects the long-term representation of activity because an indefinitely postponed source is functionally indistinguishable from a source that emitted no observable event.

Metastability can arise when nominally simultaneous requests reach an arbitration element. The arbiter resolves this condition before presenting a valid grant, although the resolution time has no fixed upper bound in the idealized circuit model. Practical designs contain the resulting uncertainty within the arbitration path rather than allowing an ambiguous address onto the shared bus.

Routing and connectivity

An AER address identifies an event source, but it does not inherently specify the event’s destination. A routing component maps incoming addresses to one or more output channels. Changing this mapping changes the effective connectivity of the neuromorphic system without altering the physical arrangement of the source circuits.

Multicast routing permits a single event to reach several destinations. This operation represents neural fan-out more efficiently than retransmitting an independent source event for every target. The router may duplicate the event internally or may associate one incoming address with a stored set of output routes.

Address remapping also allows systems with different local coordinate schemes to communicate. A sensory chip can assign addresses according to pixel position, while a receiving neural array can interpret the remapped values as indices into a population of synapses. The communication layer therefore preserves event identity while permitting destination-specific interpretations.

Large systems replace a single parallel bus with hierarchical or packet-switched interconnects. Events are encapsulated in packets and carried through a network-on-chip, where routers select paths according to destination fields. This architecture retains the event-driven semantics of AER while changing its electrical realization.

Sensory representation

AER is closely associated with event-based sensory devices. An event camera independently monitors changes at each pixel and transmits an address when local logarithmic brightness crosses a threshold. The output is an asynchronous stream rather than a sequence of complete image frames, and unchanged regions generate no events.

The representation separates spatial identity from temporal occurrence. Pixel coordinates provide the address, while event timing describes local visual dynamics. A polarity field distinguishes the direction of the brightness change without requiring the device to transmit the absolute intensity measured at that location.

Silicon cochleas use related representations for auditory processing. Their channels correspond to frequency-selective elements, and events represent activity within those channels. The event address identifies the channel, while the temporal pattern retains information about the acoustic waveform and the dynamics of the cochlear model.

These sensory uses do not make AER equivalent to a particular encoding algorithm. The protocol transports discrete activity generated by the sensor, whereas the sensor’s local circuitry determines which physical changes become events. Threshold selection, adaptation, and noise suppression therefore precede AER transmission rather than forming intrinsic properties of the representation.

Capacity and information loss

The maximum sustainable event rate is bounded by the time required for each transfer and by the degree of parallelism in the communication fabric. A bus with a complete handshake time (T_h) has an idealized capacity of approximately

[ R_{\max}=\frac{1}{T_h}. ]

Protocol overhead and arbitration delays reduce the usable rate below this bound. Packet networks introduce additional constraints through router service rates, link widths, and finite buffers.

When source activity exceeds capacity, an implementation can delay events, merge redundant activity, or discard events after storage resources are exhausted. Delayed events preserve address information but distort timing. Merged events preserve the presence of activity over an interval but remove individual event times. Discarded events alter both event count and temporal structure.

Consequently, AER fidelity cannot be evaluated solely by checking whether addresses are transmitted correctly. Timing error, event loss, and reordering influence the computation performed by the receiving system. Their significance depends on whether the receiver uses event counts, precise spike timing, or population-level activity.

Relation to contemporary neuromorphic systems

Modern spiking neural network hardware commonly uses packetized communication derived from AER principles. A spike is represented as an addressed event, and programmable routers deliver it to processor cores or synaptic memory structures. Explicit timestamps are used when network delay must be separated from simulated neural time.

Systems such as SpiNNaker carry spike events through a digital packet network optimized for multicast traffic. Other neuromorphic processors integrate event routing more tightly with local neuron and synapse circuits. The physical protocols differ from early parallel AER buses, but they preserve the central abstraction that a brief event can identify an active source without continuously transmitting its state.

AER also remains a direct interface format for event-based sensors. Hardware adapters and software frameworks translate between parallel handshakes, serialized event links, and timestamped packet streams. These translations preserve the source address while accounting for differences in timing representation and transport capacity.