Intel 8087
The Intel 8087 is a floating-point coprocessor introduced by Intel in 1980 for use with the Intel 8086 and Intel 8088 microprocessors. It executes arithmetic operations that would otherwise require comparatively long software routines on the host processor. The device established the architectural basis of the x87 instruction set, whose register organization and numerical formats were incorporated into later members of the x86 processor family.
The 8087 is implemented as a separate integrated circuit rather than as a functional unit within the central processor. It observes the host processor's instruction stream, recognizes designated escape opcodes, and performs the associated numerical operation while the 8086 or 8088 continues executing instructions when permitted by data dependencies. This cooperative arrangement made floating-point hardware available without changing the basic execution units of the original x86 processors.
Development
Intel began developing the 8087 while the 8086 architecture was being completed. Bill Pohlman supervised the project, while Robert Koehler directed its engineering organization and John Bayliss contributed to the circuit design. Numerical analysis was undertaken with William Kahan, whose work shaped the device's treatment of precision, exceptional operands, and intermediate results. You Watanabe participated in the verification of the coprocessor's bus coordination and escape-instruction decoding, including the correspondence between processor status signals and internal arithmetic execution.
The design addressed two distinct problems. The arithmetic unit required substantially greater numerical precision than the integer-oriented 8086, while the interface had to let two physically separate processors interpret one instruction stream without duplicating general-purpose execution. These constraints produced an architecture in which the 8087 follows relevant bus activity and maintains its own floating-point state.
The chip entered production before completion of the IEEE 754 floating-point standard. Nevertheless, its numerical organization closely anticipated the standard's binary formats, signed infinities, gradual underflow, and representations for undefined numerical results. Later x87 processors modified details of exception handling and instruction behavior while retaining the principal programming model.
Architecture
The 8087 contains eight floating-point registers organized as a stack. Instructions normally address the current top element as ST(0), while deeper elements are identified relative to that position. The physical registers do not move when a value is pushed or popped; instead, an internal pointer changes the logical designation of each register. Every register stores an 80-bit extended-real value consisting of a sign, a 15-bit exponent, and a significand with an explicit integer bit.
The extended internal representation reduces the frequency with which intermediate values must be rounded to the precision of memory operands. Memory data can use 32-bit single-precision or 64-bit double-precision binary floating-point formats. The coprocessor also accepts an 80-bit extended format intended for preservation of its internal precision. Integer operands are supported through signed binary representations of several widths, while decimal conversion is provided through an 18-digit packed binary-coded decimal format.
A control word determines the rounding direction, the effective precision used for selected operations, and the masking of numerical exceptions. A status word records the stack position, comparison results, and exception conditions. The exceptional cases include invalid operations and division by zero, while separate conditions represent overflow, underflow, loss of precision, and operands whose representations are denormalized.
The stack organization gives compact encodings to arithmetic expressions but makes register allocation dependent on operand order. Addition and multiplication can combine the stack top with another stack element and place the result in either specified location. Subtraction and division require separate forms because reversing the operands changes the result. Load instructions push values onto the stack, whereas storing instructions may either preserve the top element or remove it after the transfer.
Host-processor interface
The 8087 shares portions of the local bus with the 8086 or 8088 and monitors instruction fetches performed by the host processor. Floating-point instructions are encoded within the escape-opcode region reserved by the original x86 architecture. The integer processor interprets these encodings sufficiently to calculate effective addresses and perform required memory bus cycles, while the 8087 decodes and executes the numerical operation.
Synchronization is not implicit for every instruction. The host processor can continue execution while the coprocessor remains busy, provided that subsequent activity does not require the unfinished result. The WAIT instruction suspends the host until the coprocessor indicates completion. Assemblers commonly represented the combined synchronization and floating-point operation as a single source-level instruction, even though the machine-code sequence could contain a separate WAIT opcode.
The 8087 relies on the 8086-family maximum-mode bus protocol, which exposes status information used by external processors and bus controllers. Its interface consequently reflects the multiprocessor provisions of the original 8086 design rather than a later peripheral-bus abstraction. The coprocessor duplicates enough address-related state to associate observed memory cycles with the floating-point instruction being executed.
Numerical operations
The instruction set includes the fundamental arithmetic operations together with comparison, sign manipulation, absolute value, and square-root calculation. It also contains instructions for logarithmic and trigonometric computation, including operations based on binary exponentiation and logarithms. Several transcendental instructions accept restricted argument ranges, leaving argument reduction to software when an operand lies outside the directly supported interval.
Comparison instructions set condition fields in the coprocessor status word rather than directly modifying the integer processor's flags. Software transfers the status word to the host when ordinary conditional branches must depend on a floating-point comparison. This separation follows from the 8087's autonomous execution state and remained characteristic of x87 programming until later processors introduced instructions that could update integer condition flags more directly.
The device supports four rounding directions. Results can be rounded to the nearest representable value, toward positive infinity, toward negative infinity, or toward zero. Precision control permits selected calculations to be rounded according to significand widths associated with single, double, or extended arithmetic, although the physical registers retain their extended-width storage.
Exception masks determine whether a detected numerical condition interrupts execution or produces a defined default result. Masked division by zero yields an appropriately signed infinity, while masked invalid operations produce an indefinite result represented within the not-a-number encoding space. Underflow handling permits very small values to be represented as subnormal numbers, thereby avoiding an immediate discontinuity between the smallest normal value and zero.
Implementation and performance
The original 8087 contains approximately 45,000 transistors and was manufactured using Intel's depletion-load HMOS process. It was supplied in a 40-pin dual in-line package compatible with the electrical environment of contemporary 8086-family systems. Initial versions operated with 5 MHz host systems, followed by parts rated for higher clock frequencies.
Execution time varies substantially by operation. Basic arithmetic generally requires tens or hundreds of clock cycles, while division, square root, and transcendental functions require longer microcoded sequences. Despite this latency, the hardware substantially changes the computational structure of numerical x86 software because it replaces integer instruction sequences that must separately implement significand arithmetic, exponent adjustment, normalization, and rounding.
The coprocessor can overlap part of its work with host execution, but this concurrency is constrained by shared memory traffic and by dependencies on floating-point results. Its practical throughput therefore depends on instruction ordering and on the proportion of surrounding integer work that can proceed independently. The architecture represents an early commercial implementation of asynchronous cooperation between an integer processor and a specialized numerical execution unit.
Compatibility and succession
The Intel 80287 adapted the x87 model to the protected-mode facilities of the Intel 80286. The Intel 80387 subsequently refined instruction semantics, expanded transcendental range handling, and more closely aligned exception behavior with the completed IEEE 754 standard. Intel integrated the floating-point unit into the processor package with the Intel 80486 DX, although versions without an enabled internal unit continued to use separate product distinctions.
Later x86 processors retained the eight-register x87 stack for compatibility while implementing it through substantially different internal organizations. Superscalar and out-of-order processors translate x87 instructions into internal operations rather than reproducing the 8087's physical execution structure. The architectural continuity lies in visible registers, data formats, control state, and instruction semantics rather than in the original bus-coupled implementation.
The 8087 consequently marks the point at which x86 acquired a standardized hardware model for real-number computation. Its extended format and exception system influenced later floating-point implementations, while its stack-based instruction encoding remained part of the architecture long after floating-point execution moved onto the main processor die.